Requirements
Candidates should have a degree, postgraduate qualification, PhD, or equivalent experience, along with knowledge of verification methodologies and experience using SystemVerilog. Strong communication and the ability to manage multiple projects and tight deadlines are essential; UVM and experience with mixed-signal verification, coverage, formal verification, and related design-flow activities are desirable.
Job Description
Overview
We are recruiting in the Engineering group at Pragmatic Semiconductor! We are looking for an IC Verification Engineer to join our established, high-performing IC Design team in Cambridge. Reporting to the Senior IC Verification Engineer, you will be responsible for executing verification strategies to ensure right-first-time tapeouts.
Applying verification domain knowledge, this position requires close collaboration with both digital and analog designers, and the ability to proactively report results and debug issues.
We are looking for candidates with a solid understanding of verification methologies and techniques (with UVM - Universal Verification Methodology - highly desirable) and excellent cross-functional communication.
This is an excellent opportunity to join a cohesive and dynamic team during a critical period at Pragmatic Semiconductor, with significant opportunities to learn and develop.
Key tasks
Develop appropriate verification methodologies for mixed-signal IP and FlexIC's
Work closely with design engineers to interpret design specifications
Create test bench environments to fully exercise designs
Proactively debug failures and provide verification feedback to designers
Create verification reports and statistics at different stages of design flow
Qualifications and training
You will ideally be educated to Degree/post-graduate/PhD level in a field such as Electronic Engineering, or will possess equivalent experience.
Skills and experience
ESSENTIAL
Understanding of verification methodologies and techniques
Ability to understand design specifications and to define verification methodologies
Experience in using System Verilog
Excellent communication skills, both verbal and written
Ability to work to tight deadlines and progress multiple projects simultaneously
DESIRABLE
Experience in UVM (highly desirable)
Knowledge of mixed-signal verification techniques (RNM, Verilog-AMS)
Knowledge of Gate level simulations
Proficiency in Formal Verification
Experience in defining and implementing functional, code and toggle coverage
Experience in post-tapeout bring-up and HW-SW debug
Knowledge of DFT and ATPG
Candidates who do not meet every requirement but feel their skills are a good fit for the role the role are encouraged to apply.
Pragmatic Semiconductor is committed to equity, equality, diversity, and inclusion; we strive to welcome everyone and create inclusive teams. We celebrate difference and encourage everyone to be themselves at work. Please let us know if you would like any adjustments to our application and interview process.