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MBR Partners

MBR Partners

GPU - Chief Hardware Architect

Cambridge On-site 10+ yrs exp Staffing and Recruiting 20 employees£200k – £600k / year
GPU MicroarchitectureSystem-Level ArchitectureAI Acceleration TechniquesPerformance ModellingPower Analysis

Requirements

Candidates must have 15+ years of experience in GPU or heterogeneous compute architecture and a deep understanding of GPU microarchitecture. Proven experience in delivering high-volume silicon and strong cross-functional communication skills are also required.

Job Description

Our client is one of the world's leading technology companies with over 200 000 employees and operating in 170 countries around the world.


Their spirit of innovation has led our client to work in close partnership with leading academic institutions in the UK to develop and refine the latest technologies, having invested in dedicated R&D facilities and teams in Cambridge, London, Edinburgh, and Ipswich (which are part of a global R&D team of almost 100 000 people).


We are looking for a GPU Chief Architect to be ideally be based in the Cambridge office and will offer a world-class remuneration package and our client can offer relocation assistance and visa sponsorship.


GPU Chief Architect

•We are seeking a highly experienced GPU architect to lead the definition and execution of next-generation mobile GPU architecture in our Kirin SOC, while driving architectural convergence between GPU and NPU toward a coherent xPU sub-system design.

•This role requires deep expertise in GPU microarchitecture, strong system-level architectural capability, including both hardware and software, and a thorough understanding in graphics and AI common workload. A proven track record of delivering related sub-system IP or complex SoC silicon is highly desirable.

•The successful candidate will lead the effort in shaping a converged xPU architecture native for future AI compute, optimised for performance, power efficiency, and silicon area in the next generation mobile compute platforms.

Key Responsibilities:

• xPU Converged Architecture Design


Based on 1st order principle, analyse and characterise future mobile graphics and AI workload, redefine an xPU (GPU & NPU) converged architecture, including hardware and software, from the ground up that is optimal for future applications.

Ensure compatibility or easy transition from the old architecture.

Define unified or partially unified execution resources (vector, scalar, tensor units)

Develop shared scheduling and workload dispatch mechanisms for graphics and AI

Design resource sharing and isolation strategies under mixed workloads

Evaluate architectural trade-offs between dedicated and converged compute blocks

Mobile GPU Architecture Leadership

Ensure the timely delivery of next-generation mobile GPU architecture and long-term roadmap

Lead evolution of shader cores, execution pipelines, and cache hierarchy

Drive performance, power efficiency (Perf/W), and area efficiency (Perf/mm²)

Provide architectural leadership from concept phase through tape-out

Memory & Interconnect Architecture

Define a memory hierarchy strategy for converged GPU/NPU workloads

The architect shared cache structures and bandwidth arbitration policies

Optimise on-chip interconnect for heterogeneous compute traffic

Reduce data movement overhead across compute domains

System-Level Architecture Collaboration

Collaborate with CPU, AI software, runtime, and system architecture teams

Participate in SoC-level power, thermal, and floorplanning trade-offs

Align hardware architecture with graphics APIs and AI frameworks

Support performance modelling, workload characterisation, and silicon bring-up


Required:

15+ years of experience in GPU, AI accelerator, or heterogeneous compute architecture

Deep understanding of GPU microarchitecture (SIMD/SIMT, scheduling, memory systems)

Strong knowledge of tensor/matrix computation and AI acceleration techniques

Proven experience delivering high-volume silicon

Expertise in performance modelling and power analysis

Strong cross-functional communication and leadership capability


Please ignore the salary ranges included on the job board - this is a senior-level position within a world-class company and will pay accordingly

Skills

GPU MicroarchitectureSystem-Level ArchitectureAI Acceleration TechniquesPerformance ModellingPower AnalysisHeterogeneous ComputeSilicon DesignArchitecture DesignWorkload CharacterisationMemory Hierarchy StrategyCache StructuresScheduling MechanismsResource SharingCross-Functional CommunicationLeadership CapabilityGraphics APIs

About MBR Partners

MBR Partners is a globally orientated recruitment business focused on talent acquisition across Technology areas (Telecoms, Security, Finance, Mobility, Enterprise Software, ITO & BPO Outsourcing and Utilities). Established in 2001, MBR has a proven track record for delivering high calibre talent solutions. We pride ourselves on supporting our clients globally across C-level, leadership, sales, presales, delivery, marketing and technical requirements. As with any premium provider, we stand by our commitment of delivering greater value than any other search firm. Our ultimate goal with all our clients is to be there with them for the long term and therefore not only making them satisfied at a point in time, but making them successful in the long term.