Staff RTL/Digital Design Engineer - (CPU Team) - Visas Transfers Supported
Requirements
Candidates should have thorough knowledge of microprocessor architecture and experience with RTL design, Verilog or VHDL, and simulators. Understanding of low power techniques and high performance trade-offs in CPU microarchitecture is also required.
Job Description
CPU RTL Design Engineer (Staff)
A fantastic opportunity for an experienced RTL Design Engineer to join a global leader in semiconductors, working alongside their CPU Team in Cambridge (UK).
About the Role
Working on CPU RTL development targeted for high performance, low power devices, as a CPU Micro-architecture and RTL Design Engineer, you will work with chip architects to conceive of the micro-architecture, and also help with architecture/product definition through early involvement in the product life-cycle.
What will you be doing?
- Performance exploration. Explore high performance strategies working with the CPU modelling team.
- Microarchitecture development and specification. From early high-level architectural exploration, through micro architectural research and arriving at a detailed specification.
- RTL ownership. Development, assessment and refinement of RTL design to target power, performance, area and timing goals.
- Functional verification support. Help the design verification team execute on the functional verification strategy.
- Performance verification support. Help verify that the RTL design meets the performance goals.
- Design delivery. Work with multi-functional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability and power.
What are we looking for?
- Thorough knowledge of microprocessor architecture including expertise in one or more of the following areas: instruction fetch and decode, branch prediction, instruction scheduling and register renaming, out-of-order execution, integer and floating point execution, load/store execution, prefetching, cache and memory subsystems
- Knowledge of Verilog and/or VHDL. Experience with simulators and waveform debugging tools
- Knowledge of logic design principles along with timing and power implications
- Understanding of low power microarchitecture techniques
- Understanding of high performance techniques and trade-offs in a CPU microarchitecture
- Experience using a scripting language such as Perl or Python
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Skills
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